SIMUL ... ELSE_SIMUL ... END SIMUL

C Test Script Language

Purpose

The SIMUL, ELSE_SIMUL, and END SIMUL instructions allow conditional generation of test script program.

Syntax

SIMUL

ELSE_SIMUL

END SIMUL

Description

Code enclosed within a SIMUL block is conditionally generated depending on the status of the Simulation setting in HCL OneTest™ Embedded.

The SIMUL instruction starts the conditional generation block.

The END SIMUL instruction terminates this block.

The ELSE_SIMUL instruction separates this block into two parts, one being included when the other is not, and vice versa.

This block of instructions can appear anywhere in the test program and can contain both scripting instructions or native code.

The SIMUL and END SIMUL instructions must appear as a pair. One cannot be used without the other.

The ELSE_SIMUL instruction is optional.

When using HCL OneTest™ Embedded in the command line interface, use the -nosimulation option to deactivate the simulation setting in the C Test Script Compiler.

When using the HCL OneTest™ Embedded user interface, select or clear the Simulation option in the Component Testing for C tab of the Configuration Settings dialog box.

The generating rules are as follows:

1. If Simulation is enabled => the first part of the SIMUL block is included.
2. If Simulation is disabled => the second part of the block (ELSE_SIMUL) is included if it exists. If there is no ELSE_SIMUL statement, then the SIMUL block is ignored.

Example

SIMUL

#x = 0;

ELSE_SIMUL

#x = (type_x *) malloc ( sizeof(*x) );

END SIMUL

...

SIMUL

VAR x , INIT = 0 , EV = 1

VAR p , INIT = NIL , EV = NONIL

ELSE_SIMUL

VAR x , INIT = 0 , EV = 0

VAR p , INIT = NIL , EV = NIL

END SIMUL